Sergey Berezin

My primary research interests are in the field of formal methods in computer-aided verification (or Formal Verification for short). This is a relatively young field in computer science which concerns with finding errors in hardware and computer programs, and proving correctness of such designs (absence of certain types of errors). Formal verification is often used in proving correctness of the systems where errors may be extremely costly or even life-threatening. Examples include autopilot programs in airplanes and space crafts, microprocessors, pace makers, ignition controllers in cars, and many other systems where high reliability is extremely important. Currently, I work in the Hardware Verification Group at Stanford University as a research associate. My primary focus is on the development of practical tools (computer programs) which can be used in formal verification. The success of the field highly depends on the performance and availability of such tools. Many past breakthroughs in practical applications of formal methods were possible only due to the creation of efficient programs like SMV, PVS, ACL2, SVC, and others which automated the extremely tedious mathematical reasonings that arise in formal verification. I am one of the main developers of CVC Lite, a new formal verification tool which improves on its predecessors, CVC and SVC. Both SVC and CVC proved to be extremely useful in formal verification and had a significant impact in the field. The design of CVC Lite is expected to have a similar, or even greater impact in the research community. Previously, during my Ph.D. program at Carnegie Mellon University, I have developed a theorem prover SyMP (Symbolic Model Prover), which combines two large branches of formal methods: model checking and theorem proving. This tool also serves as a programmer’s kit for writing new theorem provers specialized to various problem domains within formal verification. This tool was used to create a theorem prover for verification of computer security protocols based on Athena, and a verifier for C programs (C-Prover) targeted for embedded systems, such as ignition controllers or anti-lock braking systems in cars. I also worked on enhancements to SMV (Symbolic Model Verifier), the World’s first BDD-based symbolic model checker which was a breakthrough in finite-state verification. This technology is now used in many hardware companies for verification of critical parts of their designs.